Accelerate engineering development timelines
Today's era of smart technology is driven by the ever-increasing power of silicon chips. Innovations such as autonomous cars, smart watches, and voice-activated devices that require chips with faster compute capacities and therefore generate more data than ever before. Synopsys delivers unmatched performance and reliability to chip manufacturers as they design and market the chips that drive tomorrow's innovations. The company's NetApp AFF solution keeps the engineering organization running faster so customers can speed their time to market.
The power and rack space results were easily measurable, and we expect to see about 30% savings in the data center giving us capacity for more cores. We've accelerated engineering's development timelines and continue to improve the throughput for customers.
Sriram Sitaraman Group Director of Information Technology, Synopsys
For chip manufacturers, innovative designs require iterative regression testing and millions of simulations to work out bugs and tune chip designs. Speed is critical to maximize testing windows before release. “Being able to process thousands of simulations in parallel helps accelerate our customers' time to market and increases their competitiveness,” says Sitaraman. “But testing requires a large number of cores and an ecosystem to support it, and that means storage.”
To support engineers' growing requirements, Synopsys looked to NetApp and has started its migration to a NetApp all-flash solution for NFS. "The power and rack space results were easily measurable, and we expect to see about 30% savings in the data center, giving us capacity for more cores. We've accelerated engineering's development timelines and continue to improve the throughput for customers,” says Sitaraman. “That type of speed and accuracy helps us innovate faster and keep Synopsys products in the upper-right quadrant.”
Scalability to handle multiple petabytes with millions of files
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